1. Field of the Invention.
This invention relates to lead-on-chip integrated circuit packages. In particular, the invention relates to attaching a lead frame to an integrated circuit chip that results in improved thermal transfer of heat from within the integrated circuit package.
2. Discussion of the Related Technology.
Packaging techniques for integrated circuits have been developed in the past in an attempt to satisfy demands for miniaturization in the semiconductor industry. Improved methods for miniaturization of integrated circuits enabling the integration of millions of transistor circuit elements into single integrated silicon embodied circuits, or chips, have resulted in increased emphasis on methods to package these circuits in space efficient, yet reliable and mass producible packages.
Integrated circuits are created from a silicon wafer using various etching, doping and depositing steps that are well known in the art of fabricating integrated circuit devices. A silicon wafer may be comprised of a number of integrated circuit dies that each represent a single integrated circuit chip. Ultimately, the chip may be packaged by transfer molding plastic encasement around the chip with a variety of pin-out or mounting and interconnection schemes. For example, M-Dip (Dual-In-Line-Plastic) provides a relatively flat, molded package having dual parallel rows of leads extending from the bottom for through-hole connection and mounting to an underlying printed circuit board. More compact integrated circuits allowing greater density on a printed circuit board are the SIP (Single-In-Line-Plastic), and PLCC (Plastic Leaded Chip Carrier), SOJ (Small Outline J-leaded) molded case packages.
An integrated circuit is comprised of many interconnected transistors and associated passive circuit elements that perform a function or functions. These functions may be random access memory, central processing, communications, etc. Different types of integrated circuits are used to create a machine such as a personal computer. Combining integrated circuits requires electrically connecting each integrated circuit and also connecting to other devices such as keyboards, video monitors and printers. In order to accomplish this interconnection, conductive paths must be made available to connect the internal circuitry of an integrated circuit ("IC") to external electrical circuits.
Typically, an array of electrical conductors called a "lead frame" is used as an interface between the IC and external circuitry for facilitating interconnection. In the case of the lead-on-chip package, the lead frame is designed to align with and connect to the integrated circuit connection pads located on a face of the IC chip. These connection pads are the points at which all input and output signals, and power and ground connections are made for the IC to function as designed.
In the case of the lead-on-chip variety of IC package, the conductors of the lead frame may be any metal suitable for bonding and may be plated, either selectively or non-selectively, as is well known in the art. Each type of IC requires a lead frame with a specific pattern of wires. This pattern may be fabricated using etching or stamping principles well known in the art of printed circuits. In addition to having the correct pattern for a specific IC, the lead frame must be properly aligned and held in alignment with the IC connection pads. Once aligned the lead frame may be connected to the IC connection pads by wire bonding, tape automated bonding ("TAB"), wedge bonding or other methods well known in the art. Ball or wedge wire bonding may be aligned with the alignment fixture pins and may have a tolerance of 5 mils. TAB bonding requires more precision in the alignment of the lead flames and is normally set into place by means of automatic recognition alignment equipment which achieves a 0.5 to 1 mil tolerance.
Typically, the lead frame is held in alignment with the IC connection pads by fixedly attaching it to the IC face having the connection pads thereon. The IC face must be insulated from the lead frame because the transistors and silicon substrate that comprise the IC are exposed and would short out if the conductive lead frame came into contact with the transistors or substrate. Therefore, insulation of some type is required between the IC face having the connection pads and the lead frame.
A three layer sandwich consisting of a polyimide film carrier, such as Kapton (R), with adhesive on both sides has been used as a means for attaching the lead frame to the IC. Polyimide absorbs moisture which degrades the reliability of an integrated circuit package. The polyimide carrier may be as thin as 1 mil with adhesive of 0.5 mils on both sides making this sandwich a total thickness of 2 mils. Sandwich material thinner than 2 mils is difficult or impossible to handle as a single piece part during fabrication of the IC. Thus, the overall thickness of an IC package is affected by the 2 mil or greater thickness of the insulation and adhesive presently used during fabrication. Heat generated by the IC circuits must flow by thermal conduction through the 2 mil (three layer) dielectric polymer sandwich into the lead frame where the heat may be dissipated into the encapsulating package and/or into external heat conductive circuits.
In contrast to such prior technology, the packaging method and apparatus of the present invention attaches a lead frame to an integrated circuit chip that results in improved thermal transfer of heat from within the integrated circuit package by reducing the insulation thickness which greatly improves the thermal conduction of heat from the IC chip. Heat removal to the lead frame is improved linearly with the reduction of the sandwich thickness. In addition, the present invention may use an epoxy as both an adhesive and insulator that has at least one tenth the moisture absorption of polyimide. Reduction in the amount of moisture absorption improves the reliability of the integrated circuit package. Use of the present invention results in a reliable, cost efficient and easily manufactured IC die element packaged in transfer molded casing (hereinafter referred to as a "level-one package"). The packaging method of the invention uses a substantially thinner insulating layer or layers that also aid in obtaining an ultra thin level-one package which has particular utility in any number of high density space sensitive applications requiring ultra thin integrated circuit packaging. When the thermal conduction of the package is improved, the junction temperatures of the transistors in the IC are lowered, thus, improving the reliability of the IC in a standard package. In addition, this improved thermally conductive package may now be used in a higher thermal density application without degradation in overall performance.